vc4: Switch to actually generating vertex and fragment shader code from TGSI.
authorEric Anholt <eric@anholt.net>
Thu, 26 Jun 2014 22:07:39 +0000 (23:07 +0100)
committerEric Anholt <eric@anholt.net>
Sat, 9 Aug 2014 01:59:46 +0000 (18:59 -0700)
commit792d1c92df6f58f219eb8b77e668424cdcc9c9af
treeeff4d2ea2c8050a14118274dcb19714c609392ab
parente59890aebbad990a02c2c27531525804de47115d
vc4: Switch to actually generating vertex and fragment shader code from TGSI.

This introduces an IR (QIR, for QPU IR) to do optimization on.  It's a
scalar, SSA IR in general.  It looks like optimization is pretty easy this
way, though I haven't figured out if it's going to be good for our weird
register allocation or not (or if I want to reduce to basically QPU
instructions first), and I've got some problems with it having some
multi-QPU-instruction opcodes (SEQ and CMP, for example) which I probably
want to break down.

Of course, this commit mostly doesn't work, since many other things are
still hardwired, like the VBO data.

v2: Rewrite to use a bunch of helpers (qir_OPCODE) for emitting QIR
    instructions into temporary values, and make qir_inst4 take the 4 args
    separately instead of an array (all later callers wanted individual
    args).
12 files changed:
src/gallium/drivers/vc4/Makefile.sources
src/gallium/drivers/vc4/vc4_context.h
src/gallium/drivers/vc4/vc4_draw.c
src/gallium/drivers/vc4/vc4_program.c
src/gallium/drivers/vc4/vc4_qir.c [new file with mode: 0644]
src/gallium/drivers/vc4/vc4_qir.h [new file with mode: 0644]
src/gallium/drivers/vc4/vc4_qpu.c
src/gallium/drivers/vc4/vc4_qpu.h
src/gallium/drivers/vc4/vc4_qpu_defines.h
src/gallium/drivers/vc4/vc4_qpu_disasm.c
src/gallium/drivers/vc4/vc4_qpu_emit.c [new file with mode: 0644]
src/gallium/drivers/vc4/vc4_state.c