Remove leftover logic for 16-byte loads and stores
authorPaul Mackerras <paulus@ozlabs.org>
Thu, 28 Jul 2022 10:46:59 +0000 (20:46 +1000)
committerPaul Mackerras <paulus@ozlabs.org>
Tue, 9 Aug 2022 09:51:29 +0000 (19:51 +1000)
commit795b6e2a6b022b4a9c72c51da5d83505d94f5ee1
tree4debe209c2e27082509010054eb655d2b9b583eb
parentfc58559ee82178ba3fa1a82530bd381fa9eb55ba
Remove leftover logic for 16-byte loads and stores

This removes some logic that was previously added for the 16-byte
loads and stores (lq, lqarx, stq, stqcx.) and not completely removed
in commit c9e838b6560f ("Remove support for lq, stq, lqarx and
stqcx.", 2022-06-04).

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
common.vhdl
dcache.vhdl
loadstore1.vhdl