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(parent: 25d2e7c) | patch
build/sim/verilator: add regular_comb parameter (that defaults to False) and pass...
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 27 May 2020 17:54:52 +0000 (19:54 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 27 May 2020 17:54:52 +0000 (19:54 +0200)
commit795ff08a202f7b53b333fd6c137b51cc417a72aa
treeb79081132fd0264bbcd1a2541f60045ceb906b41tree
parent25d2e7c92f45ee91574c419d6f4e06edca9a65bccommit | diff
build/sim/verilator: add regular_comb parameter (that defaults to False) and pass it to get_verilog.
litex/build/sim/verilator.py diff | blob | history