examples: add an FSM usage example (UART receiver).
authorwhitequark <cz@m-labs.hk>
Wed, 26 Dec 2018 10:10:27 +0000 (10:10 +0000)
committerwhitequark <cz@m-labs.hk>
Wed, 26 Dec 2018 10:10:27 +0000 (10:10 +0000)
commit7985d7ac99d75fedd61fc2f39fb97793ba34a496
tree56b2ee1939b649c272c60947f99fb2e277e435e1
parent180307d06af7abf5e31d01030356a842a00b01ab
examples: add an FSM usage example (UART receiver).
examples/fsm.py [new file with mode: 0644]
nmigen/hdl/dsl.py