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(parent: 27accd7) | patch
bus/csr/SRAM: support init
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Sun, 19 May 2013 18:53:37 +0000 (20:53 +0200)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Sun, 19 May 2013 18:53:37 +0000 (20:53 +0200)
commit7ada0159fda8e470b40570089634b95f2d973600
tree9fcaaea4b97d08978fa01e62fa694bd990c775f4tree
parent27accd72b550ddc23c90c376466f09aa3f4dfefacommit | diff
bus/csr/SRAM: support init
migen/bus/csr.py diff | blob | history