mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx...

mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation

Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)