anv/icl: Add render target flush after uploading binding table
authorAnuj Phogat <anuj.phogat@gmail.com>
Thu, 15 Feb 2018 23:35:42 +0000 (15:35 -0800)
committerAnuj Phogat <anuj.phogat@gmail.com>
Fri, 16 Feb 2018 19:10:32 +0000 (11:10 -0800)
commit7b283544dc76efe5216120b178574ff561605e23
tree74a7011df7a096b102fad7d12e52d610c2e08659
parent136f583a24b14b6e05555b5dec9c0eb073c99fab
anv/icl: Add render target flush after uploading binding table

The PIPE_CONTROL command description says:

"Whenever a Binding Table Index (BTI) used by a Render Taget Message
points to a different RENDER_SURFACE_STATE, SW must issue a Render
Target Cache Flush by enabling this bit. When render target flush
is set due to new association of BTI, PS Scoreboard Stall bit must
be set in this packet."

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/vulkan/genX_cmd_buffer.c