Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53
authorClifford Wolf <clifford@clifford.at>
Tue, 2 Jul 2019 09:36:26 +0000 (11:36 +0200)
committerDavid Shah <dave@ds0.me>
Tue, 9 Jul 2019 17:46:28 +0000 (18:46 +0100)
commit7b298479d4a10ac20379955fa749e70560b72b7f
tree4c44e19d0c728bee0538439648c7a26ef166fb6f
parentfc87c010c504863b242b8882c1170396a7d1d43c
Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53

Signed-off-by: Clifford Wolf <clifford@clifford.at>
frontends/verilog/verilog_lexer.l