| author | Jim Wilson <jimw@sifive.com> | |
| Thu, 17 May 2018 22:37:38 +0000 (22:37 +0000) | ||
| committer | Jim Wilson <wilson@gcc.gnu.org> | |
| Thu, 17 May 2018 22:37:38 +0000 (15:37 -0700) | ||
| commit | 7bbce9b50302959286381d9177818642bceaf301 | |
| tree | 0ce4f20f1d1ab9a42ba1843c8d03e69332f11446 | tree |
| parent | 4e0684beff1fcd8398425b1fbe237cdbcb34c359 | commit | diff |
| gcc/ChangeLog | diff | blob | history | |
| gcc/config/riscv/riscv.c | diff | blob | history | |
| gcc/expr.c | diff | blob | history | |
| gcc/testsuite/ChangeLog | diff | blob | history | |
| gcc/testsuite/gcc.target/riscv/switch-qi.c | [new file with mode: 0644] | blob |
| gcc/testsuite/gcc.target/riscv/switch-si.c | [new file with mode: 0644] | blob |