projects / yosys.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 3728ef1) | patch
Expand +/xilinx/cells_sim.v to keep ICARUS and non -specify paresr happy
authorEddie Hung <eddie@fpgeh.com>
Fri, 14 Feb 2020 17:17:53 +0000 (09:17 -0800)
committerEddie Hung <eddie@fpgeh.com>
Thu, 27 Feb 2020 18:17:29 +0000 (10:17 -0800)
commit7d86aceee326d214b9e31602f00f6196d1213c9e
treec7300ba6fb96f7a1e4a2c038c4bc4a2355b26933tree
parent3728ef1765b3b3375481222832d3a17600ae0312commit | diff
Expand +/xilinx/cells_sim.v to keep ICARUS and non -specify paresr happy
techlibs/xilinx/cells_sim.v diff | blob | history