aarch64: Move w12-w15 range check to libopcodes

aarch64: Move w12-w15 range check to libopcodes

In SME, the vector select register had to be in the range
w12-w15, so it made sense to enforce that during parsing.
However, SME2 adds instructions for which the range is
w8-w11 instead.

This patch therefore moves the range check from the parsing
stage to the constraint-checking stage.

Also, the previous error used a capitalised range W12-W15,
whereas other register range errors used lowercase ranges
like p0-p7.  A quick internal poll showed a preference for
the lowercase form, so the patch uses that.

The patch uses "selection register" rather than "vector
select register" so that the terminology extends more
naturally to PSEL.