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(parent: 871b958) | patch
soc/integration/soc_sdram: round port.data_width/l2_size to nearest power of 2 when...
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 22 Jan 2019 08:08:35 +0000 (09:08 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 22 Jan 2019 08:08:35 +0000 (09:08 +0100)
commit7e0dd37616e39fcc8f1175860186285aed550519
tree4def631a50c7886a5b34874b612f9174f42fe8f4tree
parent871b958f85bd473a9102214a41a4569cf6d682c7commit | diff
soc/integration/soc_sdram: round port.data_width/l2_size to nearest power of 2 when it's not the case

With ECC configurations, native port data_width is not necessarily a power of 2.
litex/soc/integration/soc_sdram.py diff | blob | history