projects / yosys.git / commit
| author | Marcin Kościelnicki <koriakin@0x04.net> | |
| Thu, 21 Nov 2019 12:05:30 +0000 (13:05 +0100) | ||
| committer | Marcelina Kościelnicka <mwk@0x04.net> | |
| Wed, 29 Jan 2020 00:40:00 +0000 (01:40 +0100) | ||
| commit | 7e0e42f907260e76e3c7cb01c907a0cf61a6e326 | |
| tree | 1a948b1efc41c7d639feff064eb9e8713c2486eb | tree |
| parent | 7939727d14f44b5d56ca3806d0907e9fceea2882 | commit | diff |
| techlibs/xilinx/cells_sim.v | diff | blob | history | |
| techlibs/xilinx/cells_xtra.py | diff | blob | history | |
| techlibs/xilinx/cells_xtra.v | diff | blob | history | |
| techlibs/xilinx/tests/.gitignore | diff | blob | history | |
| techlibs/xilinx/tests/test_dsp48_model.sh | [new file with mode: 0644] | blob |
| techlibs/xilinx/tests/test_dsp48_model.v | [new file with mode: 0644] | blob |