i965: Add more stringent blitter assertions
authorBen Widawsky <benjamin.widawsky@intel.com>
Tue, 23 Dec 2014 21:59:16 +0000 (13:59 -0800)
committerBen Widawsky <benjamin.widawsky@intel.com>
Sat, 7 Feb 2015 16:08:59 +0000 (08:08 -0800)
commit7ea1e3749738c63388d3bcca327e4e4dd28f17b8
tree0647f15a5b8743ad73e812769f8f64f4339b37dc
parentefde74c89dd8596b4cc0dfd9601e55832833f20e
i965: Add more stringent blitter assertions

Blits to or from a y-tiled surface must always be a multiple of the tile size.
From page 16 of the HSW PRM
(https://01.org/linuxgraphics/sites/default/files/documentation/intel-gfx-prm-osrc-hsw-memory-views.pdf#16)
"The pitch of a tiled enclosing region must be an integral number of tile
widths"

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
src/mesa/drivers/dri/i965/intel_blit.c