soc/integration/cpu_interface: add bases, constants and memories output to csv files
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 14 Nov 2015 21:04:33 +0000 (22:04 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 14 Nov 2015 23:04:44 +0000 (00:04 +0100)
commit7ed2576ce1e09709f75118b5a763bc21c611f6ed
tree57c816ff5841aa2e141e84a422bde46e7a9ba423
parentaf909b43d540eae851462bc6a3d9e5bab26c1c2c
soc/integration/cpu_interface: add bases, constants and memories output to csv files
litex/soc/cores/uart/software/csr.py [new file with mode: 0644]
litex/soc/cores/uart/software/reg.py [deleted file]
litex/soc/cores/uart/software/wishbone.py
litex/soc/integration/cpu_interface.py