sim: bfin: se_all32bitopcodes: skip debug insns under the sim

sim: bfin: se_all32bitopcodes: skip debug insns under the sim

Since the sim has a few fake debug insns that the hardware does not, we
need to check for those before attempting to run them.  Otherwise we'll
randomly trigger the sim debug asserts/aborts/halts insns.  On the
hardware, these are proper invalid insns, and the table catches that.