arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 14 Feb 2018 17:45:38 +0000 (17:45 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 20 Feb 2018 13:30:02 +0000 (13:30 +0000)
commit803a8db53aae57d42bd2465c9284df91ed5e7641
treeffbc793bf70c643e6f1f686eb5cd8188737000c5
parenta3bb33b257324ad9da3e656e30ba61e6f4b5497f
arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly

This patch fixes the disassembly of AArch64 Exception Generating
instructions, which were not printing the encoded immediate field. This
has been accomplished by changing their underlying type to a newly
defined one.

Change-Id: If58ae3e620d2baa260e12ecdc850225adfcf1ee5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8368
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/insts/misc64.cc
src/arch/arm/insts/misc64.hh
src/arch/arm/isa/formats/aarch64.isa
src/arch/arm/isa/insts/misc64.isa
src/arch/arm/isa/templates/misc64.isa