litesata: pep8 (replace tabs with spaces)
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Mon, 13 Apr 2015 12:55:26 +0000 (14:55 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Mon, 13 Apr 2015 12:59:00 +0000 (14:59 +0200)
commit808e1fe8666715eda87df0fac3ef7ee3caba220a
tree32f1db293a34345d945c18943bc65383431334bd
parent312f302d365e64316a243b9fb72e35a6ad43697e
litesata: pep8 (replace tabs with spaces)
37 files changed:
misoclib/mem/litesata/__init__.py
misoclib/mem/litesata/common.py
misoclib/mem/litesata/core/__init__.py
misoclib/mem/litesata/core/command/__init__.py
misoclib/mem/litesata/core/link/__init__.py
misoclib/mem/litesata/core/link/cont.py
misoclib/mem/litesata/core/link/crc.py
misoclib/mem/litesata/core/link/scrambler.py
misoclib/mem/litesata/core/transport/__init__.py
misoclib/mem/litesata/example_designs/make.py
misoclib/mem/litesata/example_designs/platforms/kc705.py
misoclib/mem/litesata/example_designs/platforms/verilog_backend.py
misoclib/mem/litesata/example_designs/targets/bist.py
misoclib/mem/litesata/example_designs/targets/core.py
misoclib/mem/litesata/example_designs/test/bist.py
misoclib/mem/litesata/example_designs/test/make.py
misoclib/mem/litesata/example_designs/test/test_la.py
misoclib/mem/litesata/example_designs/test/test_regs.py
misoclib/mem/litesata/example_designs/test/tools.py
misoclib/mem/litesata/frontend/arbiter.py
misoclib/mem/litesata/frontend/bist.py
misoclib/mem/litesata/frontend/common.py
misoclib/mem/litesata/frontend/crossbar.py
misoclib/mem/litesata/phy/__init__.py
misoclib/mem/litesata/phy/ctrl.py
misoclib/mem/litesata/phy/datapath.py
misoclib/mem/litesata/phy/k7/crg.py
misoclib/mem/litesata/phy/k7/trx.py
misoclib/mem/litesata/test/bist_tb.py
misoclib/mem/litesata/test/command_tb.py
misoclib/mem/litesata/test/common.py
misoclib/mem/litesata/test/cont_tb.py
misoclib/mem/litesata/test/crc_tb.py
misoclib/mem/litesata/test/hdd.py
misoclib/mem/litesata/test/link_tb.py
misoclib/mem/litesata/test/phy_datapath_tb.py
misoclib/mem/litesata/test/scrambler_tb.py