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(parent: c5f9c00) | patch
intel/fs: Implement quad swizzles on ICL+.
authorFrancisco Jerez <currojerez@riseup.net>
Thu, 6 Dec 2018 22:11:34 +0000 (14:11 -0800)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 9 Jan 2019 20:03:08 +0000 (12:03 -0800)
commit812ede088f5f6bea4e6fba991bd59d5cce264212
treedc733a715ae81c8a0bf60c7da6ce4626f2f85573tree
parentc5f9c0009d5161e059e54a76fbdb910a6c151f9fcommit | diff
intel/fs: Implement quad swizzles on ICL+.

Align16 is no longer a thing, so a new implementation is provided
using Align1 instead.  Not all possible swizzles can be represented as
a single Align1 region, but some fast paths are provided for
frequently used swizzles that can be represented efficiently in Align1
mode.

Fixes ~90 subgroup quad swap Vulkan CTS tests.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
src/intel/compiler/brw_fs.cpp diff | blob | history
src/intel/compiler/brw_fs.h diff | blob | history
src/intel/compiler/brw_fs_generator.cpp diff | blob | history