machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
authorWilliam D. Jones <thor0505@comcast.net>
Fri, 29 Jan 2021 23:14:13 +0000 (18:14 -0500)
committerMarcelina Koƛcielnicka <mwk@0x04.net>
Tue, 23 Feb 2021 16:39:58 +0000 (17:39 +0100)
commit8348c45e4f679b44b238c0f205e2e3815c909c38
treea711146a578afa58ace19f3e79b146b5f542d872
parent120404bfda90578a014ba702d457eb85ae3711d7
machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
techlibs/machxo2/cells_map.v
techlibs/machxo2/cells_sim.v