arch-x86: Adding clflush, clflushopt, clwb instructions
authorSwapnil Haria <swapnilster@gmail.com>
Tue, 16 Jan 2018 03:49:17 +0000 (21:49 -0600)
committerJason Lowe-Power <jason@lowepower.com>
Tue, 23 Jan 2018 22:17:46 +0000 (22:17 +0000)
commit83f2b253989fd6dfc8f48d5368ae351ade91cfc6
treec11f04427040c2efedb3cbfea8227293861ba8ff
parentb074a15ec16b595cbe00cb63e2feff40059b60fb
arch-x86: Adding clflush, clflushopt, clwb instructions

This patch adds support for cache flushing instructions in x86.
It piggybacks on support for similar instructions in arm ISA
added by Nikos Nikoleris. I have tested each instruction using
microbenchmarks.

Change-Id: I72b6b8dc30c236a21eff7958fa231f0663532d7d
Reviewed-on: https://gem5-review.googlesource.com/7401
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
src/arch/x86/cpuid.cc
src/arch/x86/isa/decoder/two_byte_opcodes.isa
src/arch/x86/isa/insts/general_purpose/cache_and_memory_management.py
src/arch/x86/isa/microops/ldstop.isa