Added `imac` config for CPUs which implements the most basic working riscv32imac...
authorIlya Epifanov <elijah.epifanov@gmail.com>
Tue, 28 Apr 2020 20:13:53 +0000 (22:13 +0200)
committerIlya Epifanov <elijah.epifanov@gmail.com>
Tue, 28 Apr 2020 20:27:35 +0000 (22:27 +0200)
commit83f4dcb2c6950e33a32f08abc61aed3abc9b6e1b
tree9623749a41596fb20e219eb379a963d04eb9b9a2
parent855d614e5d7e9a6cbf229356de24cd7fa4d6418c
Added `imac` config for CPUs which implements the most basic working riscv32imac feature set, implemented for VexRiscv
litex/soc/cores/cpu/__init__.py
litex/soc/cores/cpu/vexriscv/core.py