openmp: Improve composite simd vectorization

openmp: Improve composite simd vectorization

> > I was really hoping bbs 4 and 5 would be one loop (the one I set safelen
> > and force_vectorize etc. for) and that basic blocks 6 and 7 would be
> > together with that inner loop another loop, but apparently loop discovery
> > thinks it is just one loop.
> > Any ideas what I'm doing wrong or is there any way how to make it two loops
> > (that would also survive all the cfg cleanups until vectorization)?
>
> The early CFG looks like we have a common header with two latches
> so it boils down to how we disambiguate those in the end (we seem
> to unify the latches via a forwarder).  IIRC OMP lowering builds
> loops itself, could it not do the appropriate disambiguation itself?

I realized I emit the same stmts on both paths (before goto doit; and before
falling through it), at least the MIN_EXPR and PLUS_EXPR, so by forcing
there an extra bb which does those two and having the "doit" label before
that the innermost loop doesn't have multiple latches anymore and so is
vectorized fine.

2020-10-07  Jakub Jelinek  <jakub@redhat.com>

	* omp-expand.c (expand_omp_simd): Don't emit MIN_EXPR and PLUS_EXPR
	at the end of entry_bb and innermost init_bb, instead force arguments
	for MIN_EXPR into temporaries in both cases and jump to a new bb that
	performs MIN_EXPR and PLUS_EXPR.

	* gcc.dg/gomp/simd-2.c: New test.
	* gcc.dg/gomp/simd-3.c: New test.