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(parent: 8d74749) | patch
intel/compiler: Enable the emission of ROR/ROL instructions
authorSagar Ghuge <sagar.ghuge@intel.com>
Wed, 29 May 2019 18:43:30 +0000 (11:43 -0700)
committerSagar Ghuge <sagar.ghuge@intel.com>
Mon, 1 Jul 2019 17:14:22 +0000 (10:14 -0700)
commit83fdec0f0deb98a7f48186679a491f3128fdd1fe
treecfda74c5ed1cc80dc029c0706cb17d705c54932atree
parent8d74749f812e64968d37266061293e204fea252ccommit | diff
intel/compiler: Enable the emission of ROR/ROL instructions

v2: 1) Drop changes for vec4 backend as on Gen11+ we don't support
       align16 mode (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/compiler/brw_eu.c diff | blob | history
src/intel/compiler/brw_eu.h diff | blob | history
src/intel/compiler/brw_eu_defines.h diff | blob | history
src/intel/compiler/brw_eu_emit.c diff | blob | history
src/intel/compiler/brw_fs_builder.h diff | blob | history
src/intel/compiler/brw_fs_generator.cpp diff | blob | history