X86: Add in some support for the tsc register.
authorGabe Black <gblack@eecs.umich.edu>
Thu, 12 Jun 2008 04:39:10 +0000 (00:39 -0400)
committerGabe Black <gblack@eecs.umich.edu>
Thu, 12 Jun 2008 04:39:10 +0000 (00:39 -0400)
commit8501a90f59c73896b4eea6d7ce8f1d1cc8685d53
tree6e8be3ff12c7092a551ca0e816f622083de39f8c
parentd093fcb07924cc4341b8142c448b905dd94f7125
X86: Add in some support for the tsc register.
src/arch/x86/isa/decoder/two_byte_opcodes.isa
src/arch/x86/isa/insts/system/msrs.py
src/arch/x86/isa/microops/regop.isa
src/arch/x86/isa/operands.isa
src/arch/x86/miscregfile.cc