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(parent: ece786d) | patch
bus/asmibus: swap port position to be consistent with wishbone API
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 17 Nov 2012 18:42:39 +0000 (19:42 +0100)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 17 Nov 2012 18:42:39 +0000 (19:42 +0100)
commit86090e1cbd78d8dfbce8b9e1a6afac6c0a01badf
tree11e03a542c108f5720d3f5814921f96e2bb0a922tree
parentece786d6aa75c1fc6623384dd054de213b728141commit | diff
bus/asmibus: swap port position to be consistent with wishbone API
examples/sim/abstract_transactions.py diff | blob | history
migen/bus/asmibus.py diff | blob | history