2004-01-07 Michael Snyder <msnyder@redhat.com>
authorMichael Snyder <msnyder@vmware.com>
Fri, 9 Jan 2004 19:44:50 +0000 (19:44 +0000)
committerMichael Snyder <msnyder@vmware.com>
Fri, 9 Jan 2004 19:44:50 +0000 (19:44 +0000)
commit86bc60ebf450bc883506cde9a93874ff093438e6
tree8c747e7a52469538464eb0a676e9d9c37bb02d0f
parent875a0b1471e94fce213122767cdab537fd35a3b1
2004-01-07  Michael Snyder  <msnyder@redhat.com>

        * gencode.c: Replace 'Hitachi' with 'Renesas'.
        (op tab): Add new instructions for sh4a, DBR, SBR.
        (expand_opcode): Add handling for new movxy combinations.
        (gensym_caselist): Ditto.
        (expand_ppi_movxy): Remove movx/movy expansions,
        now handled in expand_opcode.
        (gensym): Add some helpful macros.
        (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
        instead of 8-bit table (some insns are ambiguous to 8 bits).
(ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.

* interp.c: Replace 'Hitachi' with 'Renesas'.
        (union saved_state_type): Add dbr, sgr, ldst.
        (get_loop_bounds_ext): New function.
        (init_dsp): Add bfd_mach_sh4al_dsp.
(sim_resume): Handle extended loop bounds.
sim/sh/ChangeLog
sim/sh/gencode.c
sim/sh/interp.c