i965: Set Line Width correctly on Cherryview and Skylake.
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 4 Nov 2014 00:10:55 +0000 (16:10 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Sun, 9 Nov 2014 06:22:18 +0000 (22:22 -0800)
commit87927ed1f0bd92d9b0d5fae213e5c9056304f007
treef68f1eec77b712ffffddf10ab939b12f0bde4334
parenta6d8413d7ce7e7f60a66a75db5e4ea651c6cf13e
i965: Set Line Width correctly on Cherryview and Skylake.

Line Width moved to DW1 bits 29:12.  It's actually now a U11.7.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/gen8_sf_state.c