Avoid verilog-2k in verilog backend
authorClifford Wolf <clifford@clifford.at>
Thu, 21 Mar 2013 08:51:25 +0000 (09:51 +0100)
committerClifford Wolf <clifford@clifford.at>
Thu, 21 Mar 2013 08:51:25 +0000 (09:51 +0100)
commit87c771756661fda7dbcdd0bd1bf41af0c818e0d7
tree39d852b2a1f1fc3c4cfdb0e06c0497e2d78ef976
parent91b94ef57bce14b346830f19f378fbb9fd495c96
Avoid verilog-2k in verilog backend
backends/verilog/verilog_backend.cc