include auto-generated identification of use of registers per op
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 26 Sep 2018 05:28:32 +0000 (06:28 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 26 Sep 2018 05:28:32 +0000 (06:28 +0100)
commit8824d29454acf124f325420a02e4a4597a76ac9e
treee0be9f4c68daa97533489cdfa8262a93487cdde9
parent7edf7d51d4fdf9f074b3468ea864db0f60c1cc83
include auto-generated identification of use of registers per op

modified id_regs.py to take a single argument (file in riscv/insns to parse)
added call to id_regs.py in riscv.mk.in
included the auto-generated file in the insn_template.cc

now each instruction has a way - BEFORE the emulated instruction is called -
to identify which registers (RD, RS1-3, FRD, FRS1-3) are going to be used.
id_regs.py
riscv/insn_template.cc
riscv/riscv.mk.in