ARM: Fix SWP/SWPB undefined instruction behavior
authorWade Walker <wade.walker@arm.com>
Fri, 15 Jul 2011 16:53:34 +0000 (11:53 -0500)
committerWade Walker <wade.walker@arm.com>
Fri, 15 Jul 2011 16:53:34 +0000 (11:53 -0500)
commit8870a5820a458ca22cbd4bec60f223a4fe4949e6
treed0407f485a0bd6c861dd09f86e5a494dc26ed04d
parente6672d1f291e415c6d7e0453dabe8c8b7eb5ddc1
ARM: Fix SWP/SWPB undefined instruction behavior

SWP and SWPB now throw an undefined instruction exception if
SCTLR.SW == 0. This also required the MIDR to be changed
slightly so programs can correctly determine that gem5 supports
the ARM v7 behavior of SWP/SWPB (in ARM v6, SWP/SWPB were
deprecated, but not disabled at CPU startup).
src/arch/arm/ArmSystem.py
src/arch/arm/isa/insts/swap.isa