hdl.ast, back.rtlil: add source locations to anonymous wires.
authorwhitequark <cz@m-labs.hk>
Sat, 3 Aug 2019 12:44:52 +0000 (12:44 +0000)
committerwhitequark <cz@m-labs.hk>
Sat, 3 Aug 2019 12:51:57 +0000 (12:51 +0000)
commit89c5d2a47cb4b281867b91077e3c5d057220c810
treef6fddbc418bab9caa43f0e618ec7d18ffe559bca
parentb5b2c9b8a4381a5b488aa647f78ad56abd1ad646
hdl.ast, back.rtlil: add source locations to anonymous wires.

This might help with propagation of locations through optimizer
passes, since not all of them take care to preserve cells at all,
but usually wires stay intact when possible.

Also fixes incorrect source location on value.part().
nmigen/back/rtlil.py
nmigen/hdl/ast.py