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(parent: e60b2ac) | patch
ARM: Fix MPIDR and MIDR register implementation.
authorChander Sudanthi <chander.sudanthi@arm.com>
Tue, 5 Jun 2012 05:23:10 +0000 (01:23 -0400)
committerChander Sudanthi <chander.sudanthi@arm.com>
Tue, 5 Jun 2012 05:23:10 +0000 (01:23 -0400)
commit8a2ca2fd241a1019122578a875c917329710c930
tree2c4f71668dc949bd0e2fb52dc023922bde43a3actree
parente60b2ac7060eff8dd6d68c7f92ef220511e7daa2commit | diff
ARM: Fix MPIDR and MIDR register implementation.

This change allows designating a system as MP capable or not as some
bootloaders/kernels care that it's set right. You can have a single
processor MP capable system, but you can't have a multi-processor
UP only system. This change also fixes the initialization of the MIDR
register.
src/arch/arm/ArmSystem.py diff | blob | history
src/arch/arm/isa.cc diff | blob | history
src/arch/arm/system.cc diff | blob | history
src/arch/arm/system.hh diff | blob | history