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(parent: 3b41414) | patch
re PR target/30970 (Register zeroing by xor N,N should be moved out of loop)
authorUros Bizjak <ubizjak@gmail.com>
Tue, 27 Feb 2007 21:27:27 +0000 (22:27 +0100)
committerUros Bizjak <uros@gcc.gnu.org>
Tue, 27 Feb 2007 21:27:27 +0000 (22:27 +0100)
commit8ab9333261065ccc8898f515571f0276321e005d
tree4fad45ba36b586ccf01b80fa0d7a6e5aa52ae755tree
parent3b4141468342aa431ce55ca8f45c0ba20603302fcommit | diff
re PR target/30970 (Register zeroing by xor N,N should be moved out of loop)

        PR target/30970
        * config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
        *movv2df_internal): Enable pattern only for valid operand
        combinations.
        * config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
        tie only 128bit modes. For MMX registers, tie only 64bit modes.

testsuite/ChangeLog:

PR target/30970
* gcc.target/i386/gfortran.dg/pr30970.c: New test.

From-SVN: r122387
gcc/ChangeLog diff | blob | history
gcc/config/i386/i386.c diff | blob | history
gcc/config/i386/sse.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/i386/pr30970.c [new file with mode: 0644] blob