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(parent: 054fc49) | patch
amdgcn: align TImode registers
authorAndrew Stubbs <ams@codesourcery.com>
Thu, 10 Sep 2020 09:10:32 +0000 (10:10 +0100)
committerAndrew Stubbs <ams@codesourcery.com>
Fri, 11 Sep 2020 09:55:32 +0000 (10:55 +0100)
commit8ae0de5621120b16295fe6b73ca044d4c576af6d
treebc0346e655274ab0cf77e17d375e9766aa67d1d7tree
parent054fc495fac5478a119715d10e1dd76442851bb5commit | diff
amdgcn: align TImode registers

This prevents execution failures caused by partially overlapping input and
output registers.  This is the same solution already used for DImode.

gcc/ChangeLog:

* config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
* config/gcn/gcn.md: Assert that TImode registers do not early clobber.
gcc/config/gcn/gcn.c diff | blob | history
gcc/config/gcn/gcn.md diff | blob | history