RISC-V: Add support for arbitrary immediate encoding formats
authorChristoph Müllner <christoph.muellner@vrull.eu>
Tue, 28 Jun 2022 15:44:15 +0000 (17:44 +0200)
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>
Thu, 22 Sep 2022 16:06:09 +0000 (18:06 +0200)
commit8b7419c429919884adced1fd2eae8c805b45b49a
tree0ac96804e7726bb8ff28a03a429309f3a9e0665b
parent547c18d9bb95571261dbd17f4767194037eb82bd
RISC-V: Add support for arbitrary immediate encoding formats

This patch introduces support for arbitrary signed or unsigned immediate
encoding formats. The formats have the form "XsN@S" and "XuN@S" with N
being the number of bits and S the LSB position.

For example an immediate field of 5 bytes that encodes a signed value
and is stored in the bits 24-20 of the instruction word can use the
format specifier "Xs5@20".

Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
gas/config/tc-riscv.c
include/opcode/riscv.h
opcodes/riscv-dis.c