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(parent: edcc77d) | patch
re PR target/81988 (invalid std instruction with odd register)
authorEric Botcazou <ebotcazou@adacore.com>
Fri, 8 Sep 2017 17:09:16 +0000 (17:09 +0000)
committerEric Botcazou <ebotcazou@gcc.gnu.org>
Fri, 8 Sep 2017 17:09:16 +0000 (17:09 +0000)
commit8bd5e1f70755bb9d400e1ab08828d739ae9d9cf3
tree4539d205a45189e75fe76cabb6cfcb4d01a54fc1tree
parentedcc77dbd9f95301a8be1a2f2b0d774680b46a1acommit | diff
re PR target/81988 (invalid std instruction with odd register)

PR target/81988
* config/sparc/sparc.md (mulsi3): Rename into *mulsi3_sp32.
(*mulsi3_sp64): New instruction.
(mulsi3): New expander.

From-SVN: r251904
gcc/ChangeLog diff | blob | history
gcc/config/sparc/sparc.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.dg/pr81988.c [new file with mode: 0644] blob