i965/vec4: Assign correct destination offset to rewritten instruction in register...
authorFrancisco Jerez <currojerez@riseup.net>
Fri, 2 Sep 2016 05:12:04 +0000 (22:12 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 14 Sep 2016 21:50:58 +0000 (14:50 -0700)
commit8bed1adfc144d9ae8d55ccb9b277942da8a78064
tree9f424997046dd786c1c4e85b23eb8f960e51333a
parent3a74e437fdec02c28749c94bc1bcf21c3c4b48d7
i965/vec4: Assign correct destination offset to rewritten instruction in register coalesce.

Because the pass already checks that the destination offset of each
'scan_inst' that needs to be rewritten matches 'inst->src[0].offset'
exactly, the final offset of the rewritten instruction is just the
original destination offset of the copy.  This is in preparation for
adding support for sub-GRF offsets to the VEC4 IR.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
src/mesa/drivers/dri/i965/brw_vec4.cpp