radeonsi: add drirc option "radeonsi_assume_no_z_fights"
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 8 Sep 2017 13:15:08 +0000 (15:15 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Mon, 18 Sep 2017 09:25:19 +0000 (11:25 +0200)
commit8c56c45cd48e940283a8d3e951750c57694718f9
tree16af1e409dd10d6c248d9392d5355b532fd58c49
parentaab134cfa57cd2f72d4234fe3f41e392e6a4f48d
radeonsi: add drirc option "radeonsi_assume_no_z_fights"

This option enables a performance optimization where typical non-blending
draws with depth buffer may be rasterized out-of-order (on VI+, multi-SE
chips).

This optimization can lead to incorrect results when an applications
renders multiple objects with the same Z value at the same pixel, so we
will never enable it by default. But there may be applications that could
benefit from white-listing.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
src/gallium/drivers/radeonsi/driinfo_radeonsi.h
src/gallium/drivers/radeonsi/si_pipe.c
src/gallium/drivers/radeonsi/si_pipe.h
src/gallium/drivers/radeonsi/si_state.c
src/util/xmlpool/t_options.h