sv: Disambiguate interface ports
authorDavid Shah <dave@ds0.me>
Fri, 20 Sep 2019 15:12:09 +0000 (16:12 +0100)
committerDavid Shah <dave@ds0.me>
Thu, 3 Oct 2019 08:54:45 +0000 (09:54 +0100)
commit8cc1bee33c04690d729d1a8b8622be05d65f7911
tree6304b2bc4e4da62e44db6893744a55cbd032bbfe
parent1746b6373b55490314bc2e12c6584c4a1cb38a6a
sv: Disambiguate interface ports

Signed-off-by: David Shah <dave@ds0.me>
frontends/verilog/verilog_parser.y