projects / nmigen.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 064df79) | patch
build.plat,vendor: allow clock constraints on arbitrary signals.
authorwhitequark <cz@m-labs.hk>
Wed, 11 Sep 2019 23:35:43 +0000 (23:35 +0000)
committerwhitequark <cz@m-labs.hk>
Wed, 11 Sep 2019 23:35:43 +0000 (23:35 +0000)
commit8cf35ec24fb74b6c4842c9e2a05ec6e9d7f46469
tree7cb9738693ac1ca2cb4c5f4cf987ee7f3c8b98dbtree
parent064df79b5a8728200ef62928d9fb92089be4994bcommit | diff
build.plat,vendor: allow clock constraints on arbitrary signals.

Currently only done for Synopsys based toolchains (i.e. not nextpnr).

Refs #88.
nmigen/build/plat.py diff | blob | history
nmigen/vendor/lattice_ecp5.py diff | blob | history
nmigen/vendor/xilinx_7series.py diff | blob | history
nmigen/vendor/xilinx_spartan_3_6.py diff | blob | history