back.rtlil: more consistent prefixing for subfragment port wires.
authorwhitequark <whitequark@whitequark.org>
Fri, 21 Dec 2018 04:21:11 +0000 (04:21 +0000)
committerwhitequark <whitequark@whitequark.org>
Fri, 21 Dec 2018 04:21:11 +0000 (04:21 +0000)
commit8d58cbf230d1bb63d837bcbf6b0fe7029f8dd126
tree22867d0e02f4f5191da2fc1bdb3c5b1e5f0e826e
parentb0bd7bfaca2a549358b740d6325780b51fb7f26c
back.rtlil: more consistent prefixing for subfragment port wires.
nmigen/back/rtlil.py