add parallel-reduction (subvl=0) in sv/trans/svp64.py
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 4 Sep 2022 19:35:53 +0000 (20:35 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 4 Sep 2022 19:35:53 +0000 (20:35 +0100)
commit8ea6301cecb6f6a61b140cf1b10f23bdbb161961
treed858bd0f64f7658d415b0abbfb319adf488495a5
parenta22ec08c9b2d74880af702243ea8f3bbbde558eb
add parallel-reduction (subvl=0) in sv/trans/svp64.py
src/openpower/sv/trans/svp64.py