arch-riscv: Initialize interrupt mask
authorTuan Ta <qtt2@cornell.edu>
Tue, 5 Feb 2019 15:08:10 +0000 (10:08 -0500)
committerTuan Ta <qtt2@cornell.edu>
Wed, 6 Feb 2019 16:57:48 +0000 (16:57 +0000)
commit8efcc0faac252d716704b5f8f9f3e1c165910ebe
tree7321e09d0b6399b0147dcb15405d02858eaf30d9
parentff5ad434d95403005cbf229a0f4b077b6dbc502b
arch-riscv: Initialize interrupt mask

This patch initializes RISCV interrupt mask to 0.

Change-Id: I56289d9f3f319e239e305befea006a0ad4d86b75
Reviewed-on: https://gem5-review.googlesource.com/c/16162
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
src/arch/riscv/interrupts.hh