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(parent: ea8cb79) | patch
intel/perf: store default sseu configuration
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Mon, 2 Mar 2020 12:42:22 +0000 (14:42 +0200)
committerMarge Bot <eric+marge@anholt.net>
Thu, 23 Apr 2020 15:55:59 +0000 (15:55 +0000)
commit8f152ed101fbf3fad3f914a19d260c3bab556c45
tree40a30b7587367c995158693d01f902e9a0d1fe77tree
parentea8cb79742fb061817c11bc8ee7854d3b2583283commit | diff
intel/perf: store default sseu configuration

This is the powergating configuration of the EU array. The default is
everything powered.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021>
src/intel/perf/gen_perf.c diff | blob | history
src/intel/perf/gen_perf.h diff | blob | history