i965: Define virtual instruction to calculate the high 32 bits of a multiply.
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 4 Aug 2015 16:04:55 +0000 (19:04 +0300)
committerFrancisco Jerez <currojerez@riseup.net>
Thu, 6 Aug 2015 11:12:12 +0000 (14:12 +0300)
commit8f5d0988ea2ccaba7f049f113b652f331524d2a6
treec86698766eec7f268fc40a8eff912c966783f0b0
parentf7ac4ef4eeea737115d0b574fed7ecae46426072
i965: Define virtual instruction to calculate the high 32 bits of a multiply.

This instruction will translate to the MUL/MACH sequence that computes
the high 32-bits of the result of a 64-bit multiply.  Before Gen8
integer operations that used the accumulator were limited to 8-wide,
but the SIMD lowering pass can easily be hooked up to sidestep this
limitation, we just need a virtual opcode to represent the MUL/MACH
sequence in the IR.

Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
src/mesa/drivers/dri/i965/brw_fs_cse.cpp
src/mesa/drivers/dri/i965/brw_shader.cpp
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp