add extra RC1 test, without VLI.
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Sep 2022 16:31:00 +0000 (17:31 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Sep 2022 16:31:00 +0000 (17:31 +0100)
commit8fea3ef935918b2dd528c98474f6fb3b12111fb2
tree64c1c0bce44557298d5790b4bb157ea460e538fb
parentdb6d324297e415eb2358df6c31d193dae59dc256
add extra RC1 test, without VLI.
src/openpower/decoder/isa/test_caller_svp64_dd_ffirst.py