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[AARCH64][PATCH 2/3] Implementing vmulx_lane NEON intrinsic variants
authorBilyan Borisov <bilyan.borisov@arm.com>
Sun, 22 Nov 2015 15:15:20 +0000 (15:15 +0000)
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>
Sun, 22 Nov 2015 15:15:20 +0000 (15:15 +0000)
commit9030a4d3aa90c1db1a657fe5588c823f0ea73a86
tree81889465952aa9181526beb88c2294298bc9b26dtree
parent60bcff01121db11277c1ae8419ddda8f014b6196commit | diff
[AARCH64][PATCH 2/3] Implementing vmulx_lane NEON intrinsic variants

gcc/

* config/aarch64/arm_neon.h (vmulx_lane_f32): New.
(vmulx_lane_f64): Likewise.
(vmulxq_lane_f32): Refactored & moved.
(vmulxq_lane_f64): Likewise.
(vmulx_laneq_f32): New.
(vmulx_laneq_f64): Likewise.
(vmulxq_laneq_f32): Likewise.
(vmulxq_laneq_f64): Likewise.
(vmulxs_lane_f32): Likewise.
(vmulxs_laneq_f32): Likewise.
(vmulxd_lane_f64): Likewise.
(vmulxd_laneq_f64): Likewise.
* config/aarch64/aarch64-simd.md
(*aarch64_mulx_elt_<vswap_width_name><mode>, VDQSF): New pattern.
(*aarch64_mulx_elt<mode>, VDQF): Likewise.
(*aarch64_mulx_elt_to_64v2df): Likewise.
(*aarch64_vgetfmulx<mode>, VDQF_DF): Likewise.

gcc/testsuite/

* gcc.target/aarch64/simd/vmulx_lane_f32_1.c: New.
* gcc.target/aarch64/simd/vmulx_lane_f64_1.c: New.
* gcc.target/aarch64/simd/vmulx_laneq_f32_1.c: New.
* gcc.target/aarch64/simd/vmulx_laneq_f64_1.c: New.
* gcc.target/aarch64/simd/vmulxq_lane_f32_1.c: New.
* gcc.target/aarch64/simd/vmulxq_lane_f64_1.c: New.
* gcc.target/aarch64/simd/vmulxq_laneq_f32_1.c: New.
* gcc.target/aarch64/simd/vmulxq_laneq_f64_1.c: New.
* gcc.target/aarch64/simd/vmulxs_lane_f32_1.c: New.
* gcc.target/aarch64/simd/vmulxs_laneq_f32_1.c: New.
* gcc.target/aarch64/simd/vmulxd_lane_f64_1.c: New.
* gcc.target/aarch64/simd/vmulxd_laneq_f64_1.c: New.

From-SVN: r230720
16 files changed:
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64-simd.md diff | blob | history
gcc/config/aarch64/arm_neon.h diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/aarch64/simd/vmulx_lane_f32_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulx_lane_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulx_laneq_f32_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulx_laneq_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxd_lane_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxd_laneq_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxq_lane_f32_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxq_lane_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxq_laneq_f32_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxq_laneq_f64_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxs_lane_f32_1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/aarch64/simd/vmulxs_laneq_f32_1.c [new file with mode: 0644] blob