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(parent: 75300b0) | patch
add first "ExpectedState" to HDL-sim ALU test cases
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Sep 2021 23:05:07 +0000 (00:05 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 22 Sep 2021 23:05:11 +0000 (00:05 +0100)
commit907570fdb16fa0baf737a79017b28ce4b980a926
tree6b1239a266f3f9ed5c56d13acf81f4fff2259810tree
parent75300b05e802be0daaf7f9255a402bc9e6bc893acommit | diff
add first "ExpectedState" to HDL-sim ALU test cases
src/openpower/test/alu/alu_cases.py diff | blob | history