cpu: Add support for instructions that zero cache lines.
authorAli Saidi <Ali.Saidi@ARM.com>
Fri, 24 Jan 2014 21:29:30 +0000 (15:29 -0600)
committerAli Saidi <Ali.Saidi@ARM.com>
Fri, 24 Jan 2014 21:29:30 +0000 (15:29 -0600)
commit90b1775a8f87834d4c27d4c98483bb7b1e5e9679
tree5c06b3e32bde9938dc977e1a59c288e87075b521
parent6bed6e0352a68723ea55017b3e09a8c279af11ec
cpu: Add support for instructions that zero cache lines.
src/cpu/base_dyn_inst_impl.hh
src/cpu/o3/lsq_unit.hh
src/cpu/o3/lsq_unit_impl.hh
src/cpu/simple/atomic.cc
src/cpu/simple/timing.cc
src/mem/request.hh